Depending on a chip pattern of a semiconductor device, one chip size may be greater than an exposure range determined by capability of a projection optical system of an exposure apparatus. In such a case, divided exposure is employed. Divided exposure refers to an exposure method in which one chip pattern is divided into a plurality of patterns and exposure process is performed for each divided pattern. By finally connecting all divided patterns to one another, the chip pattern is formed.
Divided exposure is employed not only for an image pick-up element such as a charge coupled device (CCD) sensor and a complementary metal oxide semiconductor (CMOS) image sensor but also for manufacturing of a liquid crystal display element. Such divided exposure is disclosed, for example, in Japanese Patent Laying-Open No. 2006-310446 (PTD 1) and Japanese Patent Laying-Open No. 2011-232549 (PTD 2).